The NVMe TC IP maps the I/O queues of all functions to the hardware interface.
Any hardware application/user logic can interface with the IP using the cmd_m_axis, wqe_s_axis,
sgl_prp_req_axis, sgl_prp_fill_m_axis, and wqe_cmpl_m_axis
interfaces. Any new SQE available on any I/O queue is pushed by the NVMe TC IP through
the cmd_m_axis interface. Also, any work request
completions to be provided to the hardware application is provided through wqe_cmpl_m_axis interface. The wqe_s_axis interface is used by the hardware application to post work
requests to the NVMe TC IP. The sgl_prp_req_axis
interface is used by the hardware application to request for fetching of additional PRP
and fetch done information is intimated on sgl_prp_fill_m_axis to hardware application.