AXI4-Stream H2C Port - 3.0 English

NVMe Target Controller LogiCORE IP Product Guide (PG329)
Document ID
PG329
Release Date
2021-10-27
Version
3.0 English
Table 1. AXI4-Stream H2C Port Descriptions - s_axis_h2c (When C_CPM_QDMA = 0)
Port Name I/O Description
s_axis_h2c_tdata[C_M_AXI_DATA_WIDTH-1:0] I Data input for H2C AXI4-Stream
s_axis_h2c_qid[10:0] I Queue ID
s_axis_h2c_port_id[2:0] I Port ID
s_axis_h2c_err I If set, indicates the packet has an error. This error could be from PCIe, or the QDMA might have encountered a double bit error.
s_axis_h2c_mdata[31:0] I Metadata
s_axis_h2c_mty[5:0] I The number of bytes that are invalid on the last beat of the transaction.
s_axis_h2c_zero_byte I When set, it indicates that the current beat is an empty beat (zero bytes are being transferred)
s_axis_h2c_tvalid I Valid
s_axis_h2c_tlast I Indicates the last cycle of the packet transfer
s_axis_h2c_tready O Ready
s_axis_h2c_tcrc[31:0] I 32-bit CRC value of that beat, IEEE 802.3 CRC-32 Polynomial
Table 2. AXI4-Stream H2C Port Description - dma_s_axis_h2c (When C_CPM_QDMA=1)
Port Name I/O Description
dma_s_axis_h2c_tdata[C_M_AXI_DATA_WIDTH-1:0] I Data input for H2C AXI4-Stream
dma_s_axis_h2c_qid[10:0] I Queue ID
dma_s_axis_h2c_port_id[2:0] I Port ID
dma_s_axis_h2c_err I If set, indicates that the packet has an error. This error could be from PCIe, or the QDMA might have encountered a double bit error.
dma_s_axis_h2c_mdata[31:0] I Metadata
dma_s_axis_h2c_mty[5:0] I The number of bytes that are invalid on the last beat of the transaction.
dma_s_axis_h2c_zero_byte I When set, it indicates that the current beat is an empty beat (zero bytes are being transferred)
dma_s_axis_h2c_tvalid I Valid
dma_s_axis_h2c_tlast I Indicates the last cycle of the packet transfer
dma_s_axis_h2c_tready O Ready
dma_s_axis_h2c_par[C_M_AXI_DATA_WIDTH/8-1:0] I Odd parity calculated bit-per-byte over dma_s_axis_h2c_tdata. m_axis_h2c_dpar[0] is a parity that is calculated over dma_s_axis_h2c_tdata[7:0]. dma_s_axis_h2c_dpar[1] is a parity that is calculated over dma_s_axis_h2c_tdata[15:8], and so on.