The following table shows the relationship between the fields in the AMD Vivado™ IDE and the user parameters (which can be viewed in the Tcl Console).
| Vivado IDE Parameter/Value 1 | User Parameter/Value | Default Value |
|---|---|---|
| Basic Options Tab | ||
| Operating Mode | USE_MEMORY_BLOCK | Memory Controller |
| Memory Type | MEMORY_TYPE | Single Port RAM |
| Generate Byte-Wide Address | ENABLE_32BIT_ADDRESS | TRUE |
| Clocking Mode | CLOCKING_MODE | Common Clock |
| Memory Primitive | MEMORY_PRIMITIVE | BRAM |
| ECC Mode | ECC_MODE | No ECC |
| Memory Depth | MEMORY_DEPTH | 2048 |
| Cascade Height | CASCADE_HEIGHT | 0 |
| Optimize Unused Memory | MEMORY_OPTIMIZATION | Optimize |
| Algorithm Options | ALGORITHM | AUTO |
| Use Embedded Constraint | USE_EMBEDDED_CONSTRAINT | FALSE |
| Port A Options Tab | ||
| Write Width | WRITE_DATA_WIDTH_A | 32 |
| Read Width | READ_DATA_WIDTH_A | 32 |
| Write Mode Port A | WRITE_MODE_A | WRITE_FIRST |
| Read Latency Port A | READ_LATENCY_A | 1 |
| Read Reset Value Port A | READ_RESET_VALUE_A | 0 |
| Port A Byte Wide Writes | ENABLE_BYTE_WRITES_A | TRUE |
| Byte Size(Bits) | BYTE_WRITE_WIDTH_A | 8 |
| Port B Options Tab | ||
| Write Width | WRITE_DATA_WIDTH_B | 32 |
| Read Width | READ_DATA_WIDTH_B | 32 |
| Write Mode Port B | WRITE_MODE_B | WRITE_FIRST |
| Read Latency Port B | READ_LATENCY_B | 1 |
| Read Reset Value Port B | READ_RESET_VALUE_B | 0 |
| Port B Byte Wide Writes | ENABLE_BYTE_WRITES_B | TRUE |
| Byte Size(Bits) | BYTE_WRITE_WIDTH_B | 8 |
| Other Options Tab | ||
| Memory Initialization File | MEMORY_INIT_FILE | None |
| Auto Sleep Latency | AUTO_SLEEP_TIME | 0 |
| Wakeup Time | WAKEUP_TIME | Disable Sleep |
| Enable Assertions | SIM_ASSERT_CHK | FALSE |
| Enable Write Protection | WRITE_PROTECT | TRUE |
|
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