Example Design - Example Design - 1.2 English - PG325

Multi-Scaler LogiCORE IP Product Guide (PG325)

Document_ID
PG325
Release_Date
2026-07-22
Version
1.2 English

Multi-Scaler is a memory-based scaler. In this example design, the Multi-Scaler reads the pattern you write to the source buffer of the memory, scales it, and writes it to the destination buffer of the memory, after which the Multi-Scaler generates an interrupt that connects to the AMD Zynq™ UltraScale+™ MPSoC.

The application code reads the destination buffer before scaling, writes a specific pattern to the source buffer, programs the parameters you provide in to the hardware registers, and starts the IP. The Multi-Scaler IP reads the pattern written in to the source buffer, scales it, and writes it in to the destination buffer. After all the outputs are generated, the Multi-Scaler IP generates an interrupt, and this invokes the interrupt handler which reads the contents of the destination buffer and verifies that the scaled data available in the destination buffer is the correct.

This chapter provides an example system that includes the Video Multi-Scaler. These example designs highlight the important system-level aspects for designing with the Video Multi-Scaler, including the following:

  • The Video Multi-Scaler
  • Typical usage of the Video Multi-Scaler with other cores and usage with memory mapped AXI4 interface memory buffers.
  • Configuration of the Video Multi-Scaler by programming the registers.

The following table lists the supported platforms.

Table 1. Supported Platforms
Development Boards Additional Hardware Processor
ZCU102 N/A psu_cortexa53_0
ZCU104 N/A psu_cortexa53_0
ZCU106 N/A psu_cortexa53_0
VCK190 N/A CIPS

To open the example project, do the following:

  1. Select the Video Multi-Scaler IP from the Vivado IP catalog.
  2. Double-click the selected IP, or right-click the IP and select Customize IP from the menu.
  3. Configure the build-time parameters in the Customize IP window, and click OK. The Vivado IDE generates an example design matching the build-time configuration.
  4. In the Generate Output Products window, select Generate or Skip. If you select Generate, the IP output products generate after a brief moment.
  5. Right-click Video Multi-Scaler in the Sources panel, and select Open IP Example Design from the menu.
  6. In the Open IP Example Design window, select example project directory, and click OK.

The Vivado software then runs automation to generate the example design in the selected directory. The generated project contains a synthesizable example design. The following figure shows the Source panel of the example project. Th synthesizable example block design, along with top-level file, resides in the Design Sources catalog.

Figure 1. Source Panel