Select whether the phase-shifted clock needs to be modeled into the clock waveform or latency. No multicycle constraint is needed when modeled through latency. The PHASE_SHIFT_MODE property is set in the generated XDC. For more information, refer to Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906).
For more information on Phase Shift Mode, refer to Versal Adaptive SoC Clocking Resources Architecture Manual (AM003).