Feedback Signaling - Feedback Signaling - 1.0 English - PG321

Clocking Wizard for Versal Adaptive SoCs LogiCORE IP Product Guide (PG321)

Document_ID
PG321
Release_Date
2026-08-31
Version
1.0 English

When the Phase Alignment feature is enabled, the automatic control on-chip Clkfb_in and Clkfb_out ports are not exposed in the IP.

Figure 1. Automatic Control on-Chip
Figure 2. Automatic Control off-Chip
Figure 3. User Controlled ON or OFF Chip

When the Phase Alignment feature is disabled, the Clkfb_in and Clkfb_out ports are not exposed to the IP. CLKFBIN is directly connected to CLKFBOUT.