Revision History - Revision History - 1.0 English - PG320

Advanced IO Wizard LogiCORE IP Product Guide (PG320)
Document ID
PG320
Release Date
2025-03-19
Version
1.0 English

The following table shows the revision history for this document.

Section Revision Summary
03/19/2025 Version 1.0
Clocking of RX Added clarification about operation of Strobe/RdClk.
Examples of Tcl Console Inputs to Change the XPHY Attributes in Project Mode Updated syntax.
Asynchronous Mode Support Updated asynchronous mode structure diagram.
Advanced Tab Added details about DIFF OUT Buffer Selection.

Added clarification under IO Standard Selection about MIPI_DPHY example design support.
10/19/2022 Version 1.0
Port Descriptions New ports added.
Advanced Tab Updated options.
04/21/2022 Version 1.0
FIFO Modes Added new section
Asynchronous Mode Support Added CDR with Zero PPM mode
Advanced Bit Mode Updated XPHY Attributes table
Basic Tab Updated figure
Advanced Tab Updated figure
10/27/2021 Version 1.0
Custom Clock Data Recovery Added
06/30/2021 Version 1.0
General updates
  • Added PLL data capture clock feature
  • Advanced bit mode feature
  • Cascade clocking updates for multiple bank design
12/15/2020 Version 1.0
General updates
  • Added BiDir Support
  • Added Simple RIU Interface Support
07/14/2020 Version 1.0
Initial release. N/A