Overview - Overview - 5.0 English - PG319

The Semi-Ternary CAM Search IP core (STCAM) is a member of the family of CAMs provided by AMD. The family consists of the following members:

Binary CAM (BCAM)

Used for exact matching, BCAM is available in two versions. A software-managed version and a hardware-managed version (CBCAM). CBCAM offers you the flexibility to insert or delete entries using a hardware interface with or without a software driver. For more information, see Binary CAM Search LogiCORE IP Product Guide (PG317).

Cached DRAM Binary CAM (CDBCAM)

Used for exact matching, CDBCAM is similar to BCAM except that it uses DRAM as the primary storage for entries, whereas BCAM uses URAM or block RAM (BRAM). CDBCAM can store more entries, and, in combination with its on-chip BCAM cache, it can achieve lookup rates comparable to the BCAM. Similar to the BCAM, the CDBCAM supports both a software managed and hardware managed interface. For further information, see Cached DRAM Binary CAM LogiCORE IP Product Guide (PG427).

Semi TCAM (STCAM)

Described in this document. It is also available in two versions, one with fixed rate and latency and the other with variable rate and latency for low-cost applications. The low-cost version supports ranges to avoid costly entry explosion to cover ranges. The STCAM is fully flexible in terms of number, size and position of wildcard (ignored) fields. Every key bit has a corresponding mask bit. The number of allowed unique masks is however limited. This allows for considerable memory and logic optimizations. For LPM applications, the LPM mode of the variable rate STCAM uses special HW to compress keys which improves storage efficiency. The LPM mode uses prefix masks instead of fully flexible masks which allow for more masks at a lower cost.

DRAM Semi-Ternary CAM (DSTCAM)

DSTCAM is similar to STCAM except that it uses DRAM for storage of entries. The DSTCAN is flexible in terms of number, size, and position of wildcard fields. Every key bit has a corresponding mask bit. The number of allowed masks is however limited. This allows for considerable memory and logic optimizations. For LPM applications, the DSTCAM uses special hardware to compress keys which improves storage efficiency. The LPM mode uses prefix masks rather than fully flexible masks that reduces cost. See the DRAM Semi-Ternary CAM LogiCORE IP Product Guide (PG468).

Ternary CAM (TCAM)

The primary usage of TCAM is tables requiring full flexibility in terms of size and position of wildcard (ignored) fields. Every key bit has a corresponding mask bit stored together with the key. All entries can have different masks. TCAMs are used for Access Control List (ACL) type of lookups, requiring a large number of different masks. See the Ternary CAM Search LogiCORE IP Product Guide (PG318).

One or multiple instances of each type can be used inside the same FPGA. Different types can also be mixed inside the same FPGA. Each CAM type is optimized for its specific task in terms of hardware resource usage.

The STCAM stores (key, mask, priority, response) entries in either UltraRAM (URAM) or block RAM.

The Lookup interface of the STCAM receives a lookup key and outputs a result that contains a match flag indicating whether the masked lookup key matches the masked key of any entry in the STCAM. The width of the mask is the same as the key width. A cleared mask bit invalidates the corresponding key bit and ignores it. Both the lookup key and the stored key are bit-wise ANDed with the mask prior to the bit-wise matching. The STCAM is pipelined so that it can process a Lookup Request every clock cycle.

If multiple entries are matched, the response value of the matching entry with the lowest priority is output. If two entries have the same priority, one of them is arbitrarily picked as winner. The API software ensures that two entries with the same masked key value can not be inserted.

The entries are read and written using a driver consisting of a set of high-level API functions. The API functions are written in C and delivered as part of the IP. The API encapsulates the details of memory management and register access and provide a simple and efficient management interface. The API software with detailed documentation is found on the CAM IP product page. You must add a basic hardware read and write functions to the end of the driver file. This allows for flexible hardware mapping and the communications link between the API software and the hardware is designed to the users' specifications. The communication link could for instance be AXI4-Lite or PCIe® .

Following are the main functions of the STCAM API:

• stcam_create
• stcam_destroy
• stcam_insert
• stcam_delete
• stcam_update

Arguments for stcam_insert, stcam_delete, stcam_update are:

• key
• mask
• priority
• response

LPM mode uses a simplified API using prefix length instead of the mask and priority arguments. For LPM mode, the main functions are:

• lpm_create
• lpm_destroy
• lpm_insert
• lpm_delete
• lpm_update

The driver maintains a CPU shadow of the CAM Database. This way high latency read operations to the CAM Database from the CPU is eliminated. It also allows for testing the interaction between control plane and driver without any hardware.

All these parameters are extracted from the P4 code and VitisNetP4 tool during compilation. If STCAM is used without P4, these parameters need to be set prior to generating the hardware STCAM or calling the software API. VitisNetP4 ensures that the parameters used to generate the hardware STCAM and those used to create the software STCAM instance are synchronized. For standalone usage, you must guarantee that the parameters used to generate the hardware STCAM and the parameters used to call the software API are identical.