Timer Syncer IP - 2.3 English

Versal Devices Integrated 100G Multirate Ethernet MAC Subsystem Product Guide (PG314)

Document ID
PG314
Release Date
2024-05-30
Version
2.3 English

When the 1588 checkbox is enabled in MRMAC GUI, the Timer Syncer IP automatically generates and appropriately connects in the example design. For reference, you can generate the Example design of the MRMAC IP core.