Register Space - 2.3 English

Versal Devices Integrated 100G Multirate Ethernet MAC Subsystem Product Guide (PG314)

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2.3 English

The MRMAC IP subsystem registers are accessible in a ZIP file on the AMD webpage. All registers are accessible through the AXI4-Lite interface.

When 1588 is enabled, an additional AXI4-Lite interface port appears on the MRMAC Wrapper, through which you can configure the Master timer. For more information contact Support.