These documents provide supplemental material useful with this guide:
- Versal Adaptive SoC Transceiver Subsystem Product Guide (PG442)
- Vivado Design Suite User Guide: Release Notes, Installation, and Licensing (UG973)
- IEEE Standard for Ethernet IEEE 802.3-2022
- IEEE Standard 1588-2019, IEEE Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems
- 25G and 50G Ethernet Consortium Schedule 3 version 1.6 (August 18, 2015)
- ITU-T G.709.5 (03/2024) – Flexible OTN short-reach interfaces
- Arm® AMBA® 4 AXI4-Stream Protocol v1.0 Specification (ARM IHI 0051A)
- Arm AMBA 3 APB v1.0 Specification (ARM IHI 0024B)
- AXI to APB Bridge LogiCORE IP Product Guide (PG073)
- Vivado Design Suite: AXI Reference Guide (UG1037)
- Vivado Design Suite Tutorial: Logic Simulation (UG937)
- Vivado Design Suite User Guide: Designing IP Subsystems using IP Integrator (UG994)
- Vivado Design Suite User Guide: Designing with IP (UG896)
- Vivado Design Suite User Guide: Getting Started (UG910)
- Vivado Design Suite User Guide: Logic Simulation (UG900)
- Vivado Design Suite User Guide: Programming and Debugging (UG908)
- Versal Adaptive SoC Transceivers Wizard LogiCORE IP Product Guide (PG331)
- VCK190 Evaluation Board User Guide (UG1366)
- VMK180 Evaluation Board User Guide (UG1411)
- Versal Auto Negotiation and Link Training Interface User Guide (UG1790) (registration required)