IEEE 1588 Timestamping Support - 2.3 English

Versal Devices Integrated 100G Multirate Ethernet MAC Subsystem Product Guide (PG314)

Document ID
PG314
Release Date
2024-05-30
Version
2.3 English

This section details the packet timestamping function of the MRMAC Ethernet subsystem. This feature provides 1-step and 2-step IEEE 1588v2 functionality.

The MRMAC supports the timestamping of Ethernet frames at both ingress and egress with sub-nanosecond granularity. The option can be used for implementing several IEEE 1588v2 clocks: Ordinary, Transparent, and Boundary. Additionally, 1-step timestamp insertion into outbound precision time protocol (PTP) packets is available. The features can also be used for the generic timestamping of packets at the ingress and egress ports of a system. While the available features can be used for a variety of packet timestamping applications, the rest of this section assumes that you are implementing the IEEE 1588v2 PTP.

IEEE 1588v2 defines a protocol for performing timing synchronization across a network. A 1588 network has a single master clock timing reference, usually selected through a best master clock algorithm. Periodically, this master samples its system timer reference counter and transmits this sampled time value across the network using defined packet formats. This timer should be sampled (a timestamp) when the start of a 1588 timing packet is transmitted. Therefore, to achieve high synchronization accuracy over the network, accurate timestamps are required. If this sampled timer value (the timestamp) is placed into the packet that triggered the timestamp, this is known as one-step operation. Alternatively, the timestamp value can be placed into a follow up packet, this is known as two-step operation.

Other timing slave devices on the network receive these timing reference packets from the network timing master and attempt to synchronize their own local timer references to it. This mechanism relies on these Ethernet ports also taking timestamps (samples of their own local timer) when the 1588 timing packets are received.
Note: Further explanation of the operation of 1588 is outside of this guide. This document describes the 1588 hardware timestamping features for the subsystem.