Constraining the Subsystem - 2.3 English

Versal Devices Integrated 100G Multirate Ethernet MAC Subsystem Product Guide (PG314)

Document ID
PG314
Release Date
2024-05-30
Version
2.3 English

Required Constraints

When MRMAC is configured in dynamic mode, timing arcs are enabled for all possible combinations. Except for narrow and wide distinction, as switching between these two Serdes widths is not allowed. When in dynamic configuration, Vivado attempts to close timing for all potential modes/rates of the MRMAC. To limit the cases considered by the timing engine, set_false_path commands can be added to design XDCs to exclude unneeded cases.

The MRMAC example design.XDC file for dynamic configuration contains a sample set of constraints to disable the unneeded cases in commented form. You can explore it by tweaking it as per the requirement. A sample for 100G RX is shown here.
### RX
set_false_path -from [get_clocks -of_objects [get_pins -hier -filter { name =~ */*_exdes_support_wrapper/*_exdes_support_i/*_gt_wrapper/mbufg_gt_1/U0/USE_MBUFG_GT_SYNC.GEN_MBUFG_GT[0].MBUFG_GT_U/O1}]] -to [get_clocks -of_objects [get_pins -hier -filter { name =~ */*_exdes_support_wrapper/*_exdes_support_i/*_gt_wrapper/mbufg_gt_1/U0/USE_MBUFG_GT_SYNC.GEN_MBUFG_GT[0].MBUFG_GT_U/O2}]]
set_false_path -from [get_clocks -of_objects [get_pins -hier -filter { name =~ */*_exdes_support_wrapper/*_exdes_support_i/*_gt_wrapper/mbufg_gt_1_1/U0/USE_MBUFG_GT_SYNC.GEN_MBUFG_GT[0].MBUFG_GT_U/O1}]] -to [get_clocks -of_objects [get_pins -hier -filter { name =~ */*_exdes_support_wrapper/*_exdes_support_i/*_gt_wrapper/mbufg_gt_1_1/U0/USE_MBUFG_GT_SYNC.GEN_MBUFG_GT[0].MBUFG_GT_U/O2}]]
set_false_path -from [get_clocks -of_objects [get_pins -hier -filter { name =~ */*_exdes_support_wrapper/*_exdes_support_i/*_gt_wrapper/mbufg_gt_1/U0/USE_MBUFG_GT_SYNC.GEN_MBUFG_GT[0].MBUFG_GT_U/O2}]] -to [get_clocks -of_objects [get_pins -hier -filter { name =~ */*_exdes_support_wrapper/*_exdes_support_i/*_gt_wrapper/mbufg_gt_1_1/U0/USE_MBUFG_GT_SYNC.GEN_MBUFG_GT[0].MBUFG_GT_U/O2}]]
set_false_path -from [get_clocks -of_objects [get_pins -hier -filter { name =~ */*_exdes_support_wrapper/*_exdes_support_i/*_gt_wrapper/mbufg_gt_1_2/U0/USE_MBUFG_GT_SYNC.GEN_MBUFG_GT[0].MBUFG_GT_U/O1}]] -to [get_clocks -of_objects [get_pins -hier -filter { name =~ */*_exdes_support_wrapper/*_exdes_support_i/*_gt_wrapper/mbufg_gt_1_2/U0/USE_MBUFG_GT_SYNC.GEN_MBUFG_GT[0].MBUFG_GT_U/O2}]]
set_false_path -from [get_clocks -of_objects [get_pins -hier -filter { name =~ */*_exdes_support_wrapper/*_exdes_support_i/*_gt_wrapper/mbufg_gt_1/U0/USE_MBUFG_GT_SYNC.GEN_MBUFG_GT[0].MBUFG_GT_U/O2}]] -to [get_clocks -of_objects [get_pins -hier -filter { name =~ */*_exdes_support_wrapper/*_exdes_support_i/*_gt_wrapper/mbufg_gt_1_2/U0/USE_MBUFG_GT_SYNC.GEN_MBUFG_GT[0].MBUFG_GT_U/O2}]]
set_false_path -from [get_clocks -of_objects [get_pins -hier -filter { name =~ */*_exdes_support_wrapper/*_exdes_support_i/*_gt_wrapper/mbufg_gt_1_3/U0/USE_MBUFG_GT_SYNC.GEN_MBUFG_GT[0].MBUFG_GT_U/O1}]] -to [get_clocks -of_objects [get_pins -hier -filter { name =~ */*_exdes_support_wrapper/*_exdes_support_i/*_gt_wrapper/mbufg_gt_1_3/U0/USE_MBUFG_GT_SYNC.GEN_MBUFG_GT[0].MBUFG_GT_U/O2}]]
set_false_path -from [get_clocks -of_objects [get_pins -hier -filter { name =~ */*_exdes_support_wrapper/*_exdes_support_i/*_gt_wrapper/mbufg_gt_1/U0/USE_MBUFG_GT_SYNC.GEN_MBUFG_GT[0].MBUFG_GT_U/O2}]] -to [get_clocks -of_objects [get_pins -hier -filter { name =~ */*_exdes_support_wrapper/*_exdes_support_i/*_gt_wrapper/mbufg_gt_1_3/U0/USE_MBUFG_GT_SYNC.GEN_MBUFG_GT[0].MBUFG_GT_U/O2}]]
set_false_path -from [get_clocks -of_objects [get_pins -hier -filter { name =~ */*_exdes_support_wrapper/*_exdes_support_i/*_gt_wrapper/mbufg_gt_1_2/U0/USE_MBUFG_GT_SYNC.GEN_MBUFG_GT[0].MBUFG_GT_U/O2}]] -to [get_clocks -of_objects [get_pins -hier -filter { name =~ */*_exdes_support_wrapper/*_exdes_support_i/*_gt_wrapper/mbufg_gt_1_3/U0/USE_MBUFG_GT_SYNC.GEN_MBUFG_GT[0].MBUFG_GT_U/O2}]]

Device, Package, and Speed Grade Selections

This section is not applicable for this IP subsystem.

Clock Frequencies

This section is not applicable for this IP subsystem.

Clock Management

This section is not applicable for this IP subsystem.

Clock Placement

This section is not applicable for this IP subsystem.

Banking

This section is not applicable for this IP subsystem.

Transceiver Placement

This section is not applicable for this IP subsystem.

I/O Standard and Placement

This section is not applicable for this IP subsystem.