Write DQS-to-DQ Per-Bit Deskew - Write DQS-to-DQ Per-Bit Deskew - 1.1 English

Write DQS-to-DQ Per-Bit Deskew - Write DQS-to-DQ Per-Bit Deskew - 1.1 English - PG313

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.1 LogiCORE IP Product Guide (PG313)

Document ID

PG313

Release Date

2026-06-23

Version

1.1 English

During write per-bit deskew, a toggling 10101010 pattern is continuously written and read back while making 90° clock phase adjustments on the write DQ along with individual fine ODELAY adjustments on DQS and DQ. At the end of per-bit write DQ deskew, the write DQ bits align as they are transmit to the memory.