Write DQS to DQ Deskew - Write DQS to DQ Deskew - 1.1 English

Write DQS to DQ Deskew - Write DQS to DQ Deskew - 1.1 English - PG313

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.1 LogiCORE IP Product Guide (PG313)

Document ID

PG313

Release Date

2026-06-23

Version

1.1 English

Note: For data rates below 1,600 Mb/s, these calibration stages are skipped.

Write DQS to DQ calibration is required to center align the write DQS in the write DQ window per bit. At the start of Write DQS Centering and Per-Bit Deskew, DQS is aligned to CK but no adjustments on the write window have been made. Write window adjustments occur sequentially, as follows:

Write Per-Bit Deskew
Write DQS Centering