The minimum Single Channel DDR4 Component interface configuration is 16-bits while the maximum is 72-bits with ECC. For most configurations there are two pinout options: Optimum or CLK Expansion. CLK Expansion is only required for DDP Deep applications with five or more devices. If the DDRMC configuration already has two DDR4 output clocks enabled then the only pinout option is Optimum.
When planning for future memory topology expansions the maximum configuration depends on whether you require DDP Deep devices. If you do not require them, then a single rank 72-bit interface with the appropriate 3DS, ECC, Command/Address Parity, DM/DBI, and Pinout Swapping options allows for DQ width, 3DS device support, and ECC expansion when selecting the Optimum pinout option.
If the future topology requires DDP Deep devices, you must generate the maximum pinout with a Dual Rank configuration. This ensures the additional Control signals are included in the pinout.
If you require CLK expansion, generate the pinout as Dual Rank with two DDR4 output clocks enabled if it is not already enabled in the tools. DDP Deep 3DS Component interfaces are not supported. JEDEC standards include compatibility for DDP Deep and 3DS based packages with a single hardware design. You can therefore generate a single pinout compatible with either device type.