The HBM memory channel can enter Power Down mode or Self-Refresh mode after a period of inactivity. The option for entering Power Down mode includes a configurable value for idle memory clock cycles. After this number of consecutive idle cycles is met, the HBM Controller places the HBM channel into Power Down. To ensure data retention, the HBM Controller periodically exits power-down mode to issue refresh commands and re-enter power-down mode again.
The channel enters Self-Refresh mode after a multiple of the idle clock cycles has passed. This multiple can be 1, 2, 4, or 8. If the multiple is 1, when the idle count is reached, instead of entering Power Down mode, the Memory Controller places the HBM channel into Self-Refresh. If the value is greater than 1, the HBM channel enters Power Down mode first. It then moves into Self-Refresh mode when the idle cycle condition is met.
For example, if Power Down and Self-Refresh are both enabled, with idle time set to 4,096 and Self-Refresh set to 4x, then after 4096 idle cycles the channel enters Power Down. Then (4,096 x 4 – 4,096) 12,288 idle cycles after that, the channel enters Self-Refresh.