Placement of NoC NMU/NSU - Placement of NoC NMU/NSU - 1.1 English - PG313

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.1 LogiCORE IP Product Guide (PG313)

Document ID
PG313
Release Date
2026-06-23
Version
1.1 English

To meet QoS requirements, IP integration invokes the NoC compiler. For further placement optimization, you can provide physical location constraints as detailed in the “Assigning Locations to NoC Endpoints” section of this tutorial.

Note: For further information about the NoC Compiler, refer to Versal Adaptive SoC Hardware, IP, and Platform Development Methodology Guide (UG1387).