Non-Flipped versus Flipped - Non-Flipped versus Flipped - 1.1 English - PG313

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.1 LogiCORE IP Product Guide (PG313)

Document_ID
PG313
Release_Date
2026-06-23
Version
1.1 English

All the supported configurations have two versions of the pinout; Non-Flipped and Flipped. The Flipped version of the pinout is available for the following reasons:

  • To provide the option to free up as many pins as possible that are not under the transceivers and processor systems for user system designs.
  • To provide flexibility for PCB layout engineers for better signal routing.
  • To provide the option to have contiguous XPIO Banks for user system designs.

The following figure of the XPIO Banks in an XCVC1902VSVA2197 device helps explain the need for the flipped version of the pinout.

Figure 1. XPIO Banks in XCVC1902VSVA2197

XPIO Banks 703 through 710 are fully fabric accessible and can be used for integrated memory controller designs as well as non-memory designs. You can only use XPIO Banks 700, 701, part of 702, and 711 for integrated memory controller designs. As an example, if the system requires a single rank L/RDIMM integrated memory controller and multiple non-memory designs. This necessitates optimal pin utilization. As shown in the non-flipped single rank L/RDIMM pinout targeting XPIO Banks 709, 710, and 711, there are Free nibbles in Bank 711 which cannot be used for non-memory designs.

Figure 2. Non-Flipped Multi-Rank L/RDIMM Pinout

In this scenario, using the flipped single rank L/RDIMM pinout results in Free nibbles in XPIO Bank 709. This allows the use of these Free nibbles for non-memory designs.

Figure 3. Flipped Multi-Rank L/RDIMM Pinout

The Pinout Swapping check box in the DDR Memory tab of the AXI NoC configuration dialog controls the selection of Non-Flipped vs. Flipped pinout. For interleaved memory controllers, you can select pinout swapping separately for each interleaved controller.