NoC Master Specified Destination ID - NoC Master Specified Destination ID - 1.1 English - PG313

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.1 LogiCORE IP Product Guide (PG313)

Document ID
PG313
Release Date
2026-06-23
Version
1.1 English
Logic in the PL region can optionally drive the destination ID onto a set of pins on the NMU boundary. The logic then uses this ID to route the transaction through the NoC to the intended NSU. The following table shows the destination interface pins.
Table 1. Destination Interface Pins
Interface Pin Description
NMU_RD_DEST_MODE Enable NMU_RD_USR_DST
NMU_RD_USR_DST[11:0] 12-bit destination ID to use for read transactions
NMU_WR_DEST_MODE Enable NMU_WR_USR_DST
NMU_WR_USR_DST[11:0] 12-bit destination ID to use for write transactions

Drive RD_DEST_MODE or WR_DEST_MODE high to enable the destination interface. The value on the corresponding USR_DST pins then overrides any address decode.

Note: The current release does not support NoC Master Specified Destination ID routing.