NoC Compiler Checklist - 1.1 English - PG313

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.1 LogiCORE IP Product Guide (PG313)

Document ID
PG313
Release Date
2025-12-17
Version
1.1 English

Use the following checklist to maximize the ability of the NoC Compiler to create a solution that satisfies your traffic specifications.

  • Are the Quality of Service requirements in your Traffic Specification specified as accurately as possible? (See Quality of Service.)
    • Are LOW LATENCY and ISOCHRONOUS classes assigned to the appropriate nets? (See Traffic Classes.)
    • Are bandwidths assigned as accurately as possible? These can be over-constrained but should not be under-constrained. (See Read and Write Bandwidth.)
  • Are AXI masters transferring data using bursts that are multiples of the NoC chop size, in order to minimize the impact of NoC overhead? (See Read and Write Bandwidth.)
  • Do the average burst lengths assigned in the NoC’s Advanced QoS tab accurately reflect the burst lengths of the AXI masters? (See AXI Average Burst Length.)
  • Are Exclusive Routing Groups being used only for their intended purpose? That is, functional safety, not to guarantee bandwidth. (See Exclusive Routing Groups.)
  • Are Separate Routing Groups being used only for their intended purpose? That is deadlock avoidance. (See Separate Routing Groups.)
  • Are you aware of the impact of distance on latency through the NoC? (See Latency as a Function of NMU to NSU.)
  • Are you using Exclusive Routing Groups on Multi-SLR devices and aware of how they might conflict with the Boot Paths? (See Multi-SLR NoC Boot Paths.)
  • Are you using Versal features/IP which might be placing additional demands on NoC resources? (Debug Hub/CPM). (See 'Under-the-Hood' NoC Usage / NoC and Debug Infrastructure.)
  • Have you carefully reviewed the NoC Compiler results, including warning and error messages, and ensured that all requirements were met?