The NMU512 is a full-featured NMU which provides ingress to the vertical NoC (VNoC) channels from AXI master units in the PL array. The NMU512 has a maximum AXI data width of 512 bits (64 bytes) and is configurable as follows:
- 32 bits to 512 bits in AXI memory mapped mode
- 128 bits to 512 bits in AXI4-Stream mode
The NMU512 supports AXI4, Memory Mapped, and AXI4-Stream protocols.