After deassertion of the system reset, the PHY performs the following required internal calibration steps:
- Runs the built-in self-check of the PHY (BISC). PHY uses BISC to compute internal skews for use in voltage and temperature tracking after calibration is completed.
- After BISC completes, calibration logic performs the required power-on initialization sequence for the memory.
- Performs several stages of timing calibration for the write and read datapaths.
- After calibration completes, the PHY calculates internal offsets to be used in voltage and temperature tracking.
- PHY indicates calibration is complete, and the controller begins issuing commands to the memory.
Important: Calibration is only completed for MCs in NoC
instances with at least one NMU. MCs without a path to memory through the NoC are
not calibrated. For testing purposes, you can create a block design with CIPS
driving the MC of interest.
The following figure shows the overall flow of memory initialization and the different stages of calibration. The figure shows an interative loop to calibrate other ranks after all calibration stages are complete for the first rank. In reality, this iteration occurs on a stage-by-stage basis, after each stage completes.
Figure 1. PHY Overall Initialization and Calibration Sequence
