Incremental Design Flow for NoC Compiler - Incremental Design Flow for NoC Compiler - 1.1 English - PG313

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.1 LogiCORE IP Product Guide (PG313)

Document_ID
PG313
Release_Date
2026-06-23
Version
1.1 English

You can compile a NoC solution for a subsystem of the design, then lock the NoC solution. You can then import that subsystem along with its NoC solution into the design.

Using this flow requires the subsystem to be synthesized and the NoC routes locked before writing out a DCP. You can then import the DCP into the design using read_checkpoint and the locked NoC paths are imported with the subsystem.