HBM Stack Temperature - 1.1 English - PG313

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.1 LogiCORE IP Product Guide (PG313)
Document ID
PG313
Release Date
2024-11-13
Version
1.1 English

Each HBM stack has a temperature sensor that can be read to ensure the temperature remains below the operating threshold. The CATTRIP over temperature signal is unavailable on Versal HBM devices, so it is critical that the stack temperature is monitored.

HBM devices store their HBM temperature information in the PMC ram of the upper-most SLR in the device. Connect any accessing masters to the correct PMC slave interface for the upper-most SLR. Access to these paths are then available via the PMC[3:0]_alias address ranges as described in NoC Address Map in the Versal Adaptive SoC Technical Reference Manual (AM011). Stack temperature is accessed by a sequence of writes and reads to 32-bit registers in the PLM Runtime Configuration Area (RTCA). The following two registers provide temperature information:

  • HBM_TEMP_CONFIG_AND_MAX (0xF2014280)
  • HBM_TEMP_VAL (0xF2014284)
Note: The catastrophic temperature for the HBM stack is 120°C.
Table 1. HBM Temperature Configuration Register
Register Name Address Width Type Reset Value Description
HBM_TEMP_CONFIG_AND_MAX 0xF2014280 32 Misc 0x00000000 HBM Temp configuration settings:

Enable/ Disable temp reading;

Configuring threshold temp value for SLR;

Maximum of two temp readings (Stack0, Stack1)
Table 2. HBM_TEMP_CONFIG_AND_MAX Register Bit-Field Details
Field Name Bits Type Reset Value Description
Reserved 31:23 RO 0x0 RESERVED
STACK_MAX_TEMP 22:16 RO 0x0 Maximum of HBM_TEMP_VAL (STACK1_TEMP, STACK0_TEMP)
Reserved 15 RO 0x0 RESERVED
THRESHOLD_TEMP 14:8 RW 0x0 Recommended threshold temperature value should be ≤ 120°C
Reserved 7:2 RO 0x0 RESERVED
STACK1_EN 1 RW 0x0 STACK1 temperature: Enable=1; Disable=0
STACK0_EN 0 RW 0x0 STACK0 temperature: Enable=1; Disable=0
Important: AMD strongly recommends not editing the THRESHOLD_TEMP[14:8] bit field. It must be left at the default value of 120oC (0x78) because the catastrophic temperature for the HBM stack is 120oC.
Table 3. HBM Temperature Value Register
Register Name Address Width Type Reset Value Description
HBM_TEMP_VAL 0xF2014284 32 RW 0x00000000 Current temperature values per HBM Stack in degrees Celsius
Table 4. HBM_TEMP_VAL Register Bit-Field Details
Field Name Bits Type Reset Value Description
Reserved 31:15 RO 0x0 RESERVED
STACK1_TEMP 14:8 RO 0x0 STACK1 recommended threshold temperature value should be ≤ 120oC
Reserved 7 RO 0x0 RESERVED
STACK0_TEMP 6:0 RO 0x0 STACK0 recommended threshold temperature value should be ≤ 120oC