When designing a board with the expectation there will be changes to the memory topology in the future, then the pinout must be generated targeting the future memory topology and application features. After the hardware is designed the DDRMC can be configured for the current memory topology and application features but it also must select the appropriate pinout option.
Example
An example of this would be generating a pinout for a 72-bit (64-bit + 8-bit ECC) dual rank SODIMM but the current application only requires a 64-bit single rank SODIMM. The pinout was generated to target the maximum future configuration which was then implemented in hardware. When hardware arrives and the first use case only requires a 64-bit single rank SODIMM, then the DDRMC would be configured to a single rank 64-bit SODIMM with the Rank Expansion option selected. If the DDRMC were configured to a 64-bit single rank SODIMM with the Optimum option selected, then this would be a fundamentally different pinout and it would not pass calibration. If the DDRMC were configured correctly for Rank Expansion and the single rank SODIMM is installed, then the hardware will function correctly.