The General tab of the Customize IP dialog box is shown in the following figure.
Figure 1. General Tab
AXI Interfaces
- Number of AXI Slave Interfaces
- This is the number of NoC ingress (NMU) ports.
- Number of AXI Master Interfaces
- This is the number of NoC egress (NSU) ports.
- Number of AXI Clocks
- This is the number of independent AXI clocks that will be used across the set of NMU and NSU ports. Clock association for each interface will be inferred by the tools based on the associated clock for the interface inputs.
Inter-NoC Interfaces
- Number of Inter-NoC Slave Interfaces
- This is the number of Inter-NoC Interface ingress (INI) ports.
- Number of Inter-NoC Master Interfaces
- This is the number of Inter-NoC Interface egress (INI) ports.
Memory Controllers - DDR4/LPDDR4
- Number of Memory Controllers
- The number of integrated memory controllers connected to this axi_noc instance. Must be 0, 1, 2, or 4. If 2 or 4, the memory controllers are interleaved.
- Number of Memory Controller Ports
- The number of MC ports available to connect to in the connectivity tab. Must be 0-4. This corresponds to the number of NSU connections enabled for the MC.
- Interleave Size
- When memory controller interleaving is enabled, set the number of bytes per interleave block. Must be one of {128, 256, 512, 1024, 2048, 4096}.
- DDR Address Region 0/1
- This maps the DDRMC address with the unified system address map of the Versal device. For more information, refer to the System Address Map.