Dual Channel DDR4 Component Interfaces - Dual Channel DDR4 Component Interfaces - 1.1 English - PG313

All Dual Channel DDR4 Component interfaces always have the Optimum option. This is because all configurations follow the same basic pinout while more Nibbles are used as the data widths get larger.

The Dual Channel DDR4 Component pinouts are not compatible with Single Channel DDR4 Component pinouts. This is because of the differences in the input reference clock Nibble and the Command/Address/Control (CAC) Nibbles. The CAC Nibbles for Dual Channel interfaces map to Data Nibbles for Single Channel interfaces. One hardware design cannot satisfy the requirements of both topolgy types.

In addition, Dual Channel topologies only support a single DDR4 interface clock output because any supported configuration is within the DDP Deep loading guidelines. The default Optimum pinout automatically supports DDP Deep rank expansion or 3DS device support. There is no support for DDP Deep 3DS Single Channel or Dual Channel component interfaces. RDIMM/LRDIMM applications support DDP Deep 3DS components.

The Dual Channel DDR4 Component interface pinouts optimally pack the Triplet by placing the utilized Nibbles. Packing starts in the Left bank and expands to the Right bank as the data width increases. The following figure shows the Dual Channel 16-bit bank packing with the unused Nibbles on the Right side of the bank.

Figure 1. Dual Channel 16-Bit (2 x 16) Component Pinout with DDP Deep and 3DS Support

The Dual Channel 24-bit (16-bit Data + 8-bit ECC) interface pinout follows the Dual Channel 16-bit pinout. The additional Data Nibbles populate the Third Bank.

Figure 2. Dual Channel 24-Bit (2 x 24) Component Pinout with DDP Deep and 3DS Support

The Dual Channel 32-bit interface pinout follows the Dual Channel 24-bit pinout with the additional Data Nibbles populating in the Third Bank.

Figure 3. Dual Channel 32-bit (2 x 32) Component Pinout with DDP Deep and 3DS Support