The Versal adaptive SoC programmable NoC supports end-to-end data protection for AXI memory mapped transactions. In the AXI protocol domain of the NMU and NSU, the NoC supports the following:
- 1 bit per byte of even parity on data lines
- 1 bit of even parity on the address
You can enable parity checking in the AXI protocol domain at configuration time. Refer to Configuring the AXI NoC for more details about how to configure parity checking in the AXI protocol domain. No AXI parity checking is available between the NoC and the PS or AI Engine. Detection of parity errors results in a fatal interrupt.
In the packet domain, after chopping and conversion to the NoC packet format, the NoC supports SECDED ECC across the entire flit. The ECC syndrome is completed and checked in the NMU and NSU. No ECC checking occurs in the switch fabric.
An additional parity bit is detects errors to protect the destination ID field. If a parity error occurs in a switch, the switch signals a fatal error via an interrupt. Packet domain parity and ECC generation and checking is always enabled.