The Command/Address Parity function enables two additional pins in the DDRMC. These are the output only PAR pin and the input only ALERT_N pin. If you intend to use the Command/Address Parity function in future hardware designs, generate the pinout with this feature enabled. During hardware layout, ensure these sites route to the correct locations on the DDR4 components or DIMM connectors. When running in the application, the Command/Address parity feature can be disabled and hardware operates correctly because these signals are a functional "don’t care."