DM/DBI - DM/DBI - 1.1 English - PG313

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.1 LogiCORE IP Product Guide (PG313)

Document ID
PG313
Release Date
2026-06-23
Version
1.1 English

If you disable Write DM/DBI, or Read DBI in the DDRMC configuration, the IP does not generate these ports in the pinout. If future hardware applications require Write Data Mask or Write/Read DBI functionality, you must generate the pinout with these functions enabled. Write DM and Write/Read DBI functionality is only available for x8 and x16 devices. For RDIMM/LRDIMM devices the JEDEC standard connector handles the mapping for x4 and x8-based devices. This includes the DM/DBI pin for x8 components. This buffered DIMM scenario requires no additional care. If you require these functions for future applications, enable them when generating the pinout. Ensure these signals route to the correct sites on the DDR4 components or DIMM connector.