DDR Address Mapping Tab - DDR Address Mapping Tab - 1.1 English - PG313

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.1 LogiCORE IP Product Guide (PG313)

Document ID
PG313
Release Date
2026-06-23
Version
1.1 English

The following figure shows the DDR Address Mapping tab.

Figure 1. DDR Address Mapping

On the DDR4 Address Mapping tab, you can select a predefined address map from the list. Alternatively, you can update individual address bits from the list after selecting USER DEFINED ADDRESS MAP.