Connectivity Tab - 1.1 English - PG313

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.1 LogiCORE IP Product Guide (PG313)
Document ID
PG313
Release Date
2024-11-13
Version
1.1 English

The Connectivity tab of the Customize IP dialog box is shown in the following figure.

Figure 1. Connectivity Tab

The Connectivity tab is used to define the connectivity through the axi_noc. Connectivity is captured in the form of a connectivity matrix, as shown in the figure. The rows of the matrix correspond to the inputs to the axi_noc instance, the columns correspond to the outputs. A check in the box at the intersection of a row and a column indicates a connection from the row input to the column output. The previous figure shows:

  • Input S00_AXI is connected to outputs M00_AXI and M01_AXI.
  • Input S01_AXI is connected to output M00_INI and memory controller port 0.
  • Inter-NoC input S00_INI is connected to output M02_AXI and to memory controller port 0.