Command and Data Parity - Command and Data Parity - 1.1 English - PG313

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.1 LogiCORE IP Product Guide (PG313)

Document ID
PG313
Release Date
2026-06-23
Version
1.1 English

The HBM Controller supports independent parity for the command, read data, and write data:

Command Parity Error
When a command parity error occurs, this is considered a fatal error and the controller triggers an interrupt. The command is not re-tried.
Read Parity Error
When a read parity error is detected, the HBM Controller flags the violation and repeats the read command up to two times. If the second attempt finishes with a parity error, it is logged, and the read transaction is retired from the queue. Multiple retries reduce performance.
Write Parity Error
When a write parity error is detected, the HBM Controller flags the violation and repeats the write command up to two times. If the second attempt also finishes with a parity error, it is logged, and the write transaction is retired from the queue. Multiple retries reduce performance.