The NMU supports address remapping as a way to override the default address map and provide simple address virtualization. There are sixteen sets of address remap registers in the configuration space of the NMU. Each address remap register supports the following:
- Matching address ranges from 64 KB to the full address map.
- Address matching to determine the destination ID to route the transaction.
- Optional replacement address for the matched portion of the address.
Use Cases for Address Remapping
- PL to PL Remapping
- For cases when a PL Master only supports 32-bit addressing. Use the NoC
remapping feature to translate a 32-bit address to access PL endpoints in
the address region 0x200_0000_0000. The following figure shows this use
case.Figure 1. PL to PL
Table 1. Remapping Input Address Remapped Address 0x0000_0000 0x200_0000_0000 0x0000_0001 0x200_0000_0001 0x0000_0002 0x200_0000_0002 ... ... 0xFFFF_FFFF 0x200_FFFF_FFFF - PL to DDRMC Remapping
-
- Similar to the previous example, a PL Master with 32-bit addressing can
access a DDR MC memory range by using NoC remapping. The following
figure shows this use case. Figure 2. PL to DDRMC
As shown in the previous figure, to perform memory remapping, the first NoC remaps the 32-bit address to the target space. Through an INI connection in the second NoC, it writes to memory.
- Similar to the previous example, a PL Master with 32-bit addressing can
access a DDR MC memory range by using NoC remapping. The following
figure shows this use case.
Note: Although CIPS to DDRMC re-mapping is theoretically
possible, it is strongly discouraged. There are no NoC address ranges between
0x8000_0000-0xFFFF_FFFF in system address space that the R5 can borrow from to get
additional DDRMC memory range.