1x16 Component Interface (Non-Flipped) - 1x16 Component Interface (Non-Flipped) - 1.1 English - PG313

Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller 1.1 LogiCORE IP Product Guide (PG313)

Document_ID
PG313
Release_Date
2026-06-23
Version
1.1 English
Figure 1. Connections for a 1x16 LPDDR4/4x Interface

The following figure shows the nibble utilization for a 1x16 interface in the non-flipped configuration. DQ indicates data nibbles. AC indicates Address/Command/Control nibbles. sys_clk indicates a nibble comprising the System Clock pair, RESET_n, and ALERT_n signals. Refer to Clocking for System Clock details.

Important: The nibble utilization figure is based on the fixed pinout output by Vivado for this configuration.
Figure 2. Nibble Utilization for 1x16 Component Interface (Non-Flipped)