AXI4-Stream DSC Video Interface - 3.1 English

DisplayPort 1.4 RX Subsystem Product Guide (PG300)

Document ID
PG300
Release Date
2024-05-30
Version
3.1 English

This interface is enabled when DSC is selected.

Table 1. DisplayPort 1.4 RX Subsystem DSC Interface
Port Name I/O Description
m_axis_video_stream1_tdata[191:0] O AXI4-Stream Video data from DP RX subsystem.
  • 1-lane - [23:0] bits are valid - {ByteN+2, ByteN+1, ByteN}
  • 2-lane - [47:0] bits are valid - {Byte5, ByteN+4, ByteN+3, ByteN+2, ByteN+1, ByteN}
  • 4-lane - [95:0] bits are valid - {ByteN+11, ByteN+10, ByteN+9, ByteN+8, ByteN+7, ByteN+6, ByteN+5, ByteN+4, ByteN+3, ByteN+2, ByteN+1, ByteN}.
m_axis_video_stream1_tvalid O AXI4-Stream Video valid from the DP RX subsystem.
m_axis_video_stream1_tready I AXI4-Stream ready input to the DP RX subsystem.
m_axis_video_stream1_tlast O

AXI4-Stream end of line (EOL) from DP RX subsystem.

m_axis_video_stream1_tuser O [0] - Start of frame (SOF) from DP RX subsystem

[12:1] - TKEEP for each byte on TDATA. Each bit specifies the validity of bytes on TDATA.

MSB corresponds to TDATA[95:88] and LSB corresponds to TDATA[7:0].

In 1-lane - [12:4] are always 0. In 2-lane – [12:7] are always 0.

[13] – VB-ID bit 6 (DSC Enabled)