There is a common master device design flaw listed as a protocol violation in the AMBA AXI Protocol Specification that is not possible to detect by the firewall. The protocol specification allows slave interfaces to delay asserting AWREADY until after it receives both AWVALID and WVALID. This is a useful way to streamline the slave interface design, especially for AXI4-Lite slaves. To avoid the possibility of deadlock, the protocol specification prohibits any master interface from delaying WVALID until after it receives AWREADY. If a firewall configured in SI-side mode (or an AXI Protocol Checker IP) is placed downstream of a master device that violates this rule, it has no way to detect this violation. It is not illegal for a master to assert AWVALID before WVALID, and there is no way for the firewall to determine whether the delay is due to the master waiting for AWREADY to arrive. If a firewall configured in MI-side mode is placed downstream of a master device that violates this rule, it can trigger a timeout fault on the expected AWREADY assertion that never occurs, but its root-cause would be due to a design flaw in the master.