The Soft Pause Register is shown in the following table.
| Bit(s) | Name | Core Access | Default Value | Description |
|---|---|---|---|---|
| 31:5 | Reserved | RW | Reserved | |
| 4 | Soft Pause B | RW | 0 | Temporarily stall transfers across the IP on the B channel. Remains sticky until re-written. The MAX_WRITE_TO_BVALID_WAITS and MAX_BREADY_WAITS timeout counters are frozen during this soft pause. |
| 3 | Soft Pause R | RW | 0 | Temporarily stall transfers across the IP on the R channel. Remains sticky until re-written. The MAX_CONTINUOUS_RTRANSFERS_WAITS and MAX_RREADY_WAITS timeout counters are frozen during this soft pause. |
| 2 | Soft Pause W | RW | 0 | Temporarily stall transfers across the IP on the W channel. Remains sticky until re-written. The MAX_WREADY_WAITS and MAX_CONTINUOUS_WTRANSFERS_WAITS timeout counters are frozen during this soft pause. |
| 1 | Soft Pause AW | RW | 0 | Temporarily stall transfers across the IP on the AW channel. Remains sticky until re-written. The MAX_AWREADY_WAITS and MAX_WVALID_TO_AWVALID_WAITS timeout counters are frozen during this soft pause. |
| 0 | Soft Pause AR | RW | 0 | Temporarily stall transfers across the IP on the AR channel. Remains sticky until re-written. The MAX_ARREADY_WAITS timeout counter is frozen during this soft pause. |