SI-Side Soft Fault Control Register - SI-Side Soft Fault Control Register - 1.2 English - PG293

AXI Protocol Firewall IP LogiCORE IP Product Guide (PG293)
Document ID
PG293
Release Date
2025-08-29
Version
1.2 English

The SI-Side Soft Fault Control register is shown in the following table.

Table 1. SI-Side Soft Fault Control Register (0x104)
Bit(s) Name Core Access Default Value Description
31:28 Reserved WO   Reserved
27 Trigger User-defined Write Block WO 0 Set SI-Side Fault Status Register Bit[27]. Self-clearing when block is triggered.
26:17 Trigger Write Block WO 0 Copy bit pattern to SI-side Fault Status Register Bits[26:17]. Self-clearing when block is triggered.
16:8 Reserved WO   Reserved
7 Trigger User-defined Read Block WO 0 Set SI-Side Fault Status Register Bit[7]. Self-clearing when block is triggered.
6:1 Trigger Read Block WO 0 Copy bit pattern to SI-side Fault Status Register Bits[6:1]. Self-clearing when block is triggered.
0 Reserved WO   Reserved