MI-Side Soft Fault Control Register - MI-Side Soft Fault Control Register - 1.2 English - PG293

AXI Protocol Firewall IP LogiCORE IP Product Guide (PG293)
Document ID
PG293
Release Date
2025-08-29
Version
1.2 English

The MI-Side Soft Fault Control register is shown in the following table.

Table 1. MI-Side Soft Fault Control Register (0x4)
Bit(s) Name Core Access Default Value Description
31:25 Reserved WO   Reserved
24 Trigger User-defined Write Block WO 0 Set MI-Side Fault Status Register Bit[24]. Self-clearing when block is triggered.
23:17 Trigger Write Block WO 0 Copy bit pattern to MI-side Fault Status Register Bits[23:17]. Self-clearing when block is triggered.
16:9 Reserved WO   Reserved
8 Trigger User-defined Read Block WO 0 Set MI-Side Fault Status Register Bit[8]. Self-clearing when block is triggered.
7:1 Trigger Read Block WO 0 Copy bit pattern to MI-side Fault Status Register Bits[7:1]. Self-clearing when block is triggered.
0 Reserved WO   Reserved