When operating in MI-side mode, the
NUM_{READ,WRITE}_THREADS parameters
determine the number of content addressable memory (CAM) entries to
be implemented in the IP. Once all CAM locations are filled, any
further commands having a non-matching ID cannot be propagated to
the MI; otherwise protocol checking becomes unreliable. If a
transaction is received on the SI with a non-matching ID while the
CAM is full, the corresponding s_axi_{ar,aw}ready
is deasserted and the SI stalls (for read or write) until a vacancy
is created in the CAM. The transaction causing the CAM overflow
stall can be accepted (handshake completion) on the SI, even though
it is not propagated to the MI. This CAM-full stall condition does
not trigger any fault. Thread-tracking CAMs are not needed for
SI-side mode operation; the NUM_*THREADS parameters are ignored.
Similarly, the NUM_{READ,WRITE}_OUTSTANDING parameters determine
the size of the outstanding transaction counters to be implemented
for both MI-side and SI-side modes. Once a counter reaches its
maximum value, further commands are also stalled by deasserting
s_axi_{ar,aw}ready.
(Again, no fault is triggered by reaching the maximum limit of an
outstanding transaction counter.)