Ingress - 2.7 English - PG292

1G/10G/25G Switching Ethernet Subsystem Product Guide (PG292)

Document ID
PG292
Release Date
2024-12-11
Version
2.7 English
Figure 1. Ingress

The ingress logic does not parse the ingress packets to search for 1588 (PTP) frames. Instead, it takes a timestamp for every received frame and outputs this value to the user logic. The feature is always enabled, but the timestamp output can be ignored if you do not require this function.

Timestamps are filtered after the PCS decoder to retain only those timestamps corresponding to an Start of Packet (SoP). These 80-bit timestamps are output on the system side. The timestamp is valid during the SoP cycle.

The accuracy of the 1588 timestamping of Ethernet frames is dependent on several factors, some of which are outside of the scope of this IP core:

timestamp error = (10/25G IP Core 1588 timestamp error) + (external timestamp sampling error) + (error due to system clock jitter, transceiver uncertainty, other factors)

10/25G IP Core 1588 timestamp error:

  • Ordinary Clock mode: +/- 1 ns (due to granularity of ToD format)
  • Transparent Clock mode: +/- 1 SerDes clock bit time
  • For 1G, a variation of ± 10 ns is observed under all operating conditions

For more information on accuracy values for 1G and 10/25G, see AXI 1G/2.5G Ethernet Subsystem Product Guide (PG138) and 10G/25G High Speed Ethernet Subsystem Product Guide (PG210) respectively.