Egress - 2.7 English

1G/10G/25G Switching Ethernet Subsystem Product Guide (PG292)
Document ID
PG292
Release Date
2023-10-18
Version
2.7 English
Figure 1. Egress

The TS references are defined as follows:

TS1
The output timestamp signal when a two-step operation is selected.
TS1'
The plane to which both timestamps are corrected.

TS1 always has a correction applied, so that it is referenced to the TS1' plane.

Note: For 10G 1588, registers defined at address 0x0190, 0x0194, and 0x0198 must be programmed. For 1G 1588, registers defined at address 0x0190, 0x0194, 0x004C, 0x0050, and 0x0054 must be programmed.

If using the ToD format, for both 1-step and 2-step operations, the full captured 80-bit ToD timestamp is returned to the client logic using the additional ports defined in Port Descriptions.

If using the Correction Field format, for both 1-step and 2-step operations, the full captured 64-bit timestamp is returned to the client logic using the additional ports defined in Port Descriptions (with the upper bits of data set to zero as defined in the table).

Frame-by-Frame Timestamping Operation

The operational mode of the egress timestamping function is determined by the settings on the 1588 command port. The information contained within the command port indicates one of the following:

  • No operation: The frame is not a PTP frame and no timestamp action should be taken.
  • Two-step operation is required and a tag value (user-sequence ID) is provided as part of the command field; the frame should be timestamped, and the timestamp made available to the client logic, along with the provided tag value for the frame. The additional MAC transmitter ports provide this function.