| Bits | Default | Type | Signal |
|---|---|---|---|
| 0 | 1 | RW | ctl_tx_lat_adj_enb |
| 1 | 1 | RW | ctl_rx_lat_adj_enb Note: For 1G mode, this register is
RESERVED.
|
| 2 | 0 | RW | ctl_ptp_transpclk_mode |
| 3 | 0 | RW | ctl_tx_timestamp_adj_enb Note: For 1G mode, this
register is RESERVED.
|
| 4 | 1 | RW | ctl_rx_timestamp_adj_enb Note: For 1G mode, this register is
RESERVED.
|