Use the following steps to run the BIT and ELF files on the hardware setup:
- Connect the JTAG cable and USB-UART cable to the board.
- Switch on the Board.
- Open the board user interface GUI for Versal. The Enter
Board Information tab opens, as shown in the following figure.
- Fill in the information as per the board part used, and then click OK. This displays a new tab.
- Click the Clock tab, and then set the user1
FMC1 si570 frequency clock to 148.35 as shown in
the following figure:
- Select the VCCAUX Workaround tab, and then select
the checkbox for VCC_RAM (.78v) as shown in the
following figure.
- Scroll to and select the FMC tab.
- Select the checkbox for Set Vadj (0.5 to 1.5V),
and then enter a voltage value in the 0.5-1.5V range, as shown in the following
figure.
- After the settings are passed, close the tabs.
- Navigate to <Component Name>_ex/imports.
- Start the Xilinx Software Debugger (XSDB) by using the command prompt to source XSDB from the build area.
- Run the following command to program FPGA and to execute the
application:
source xsdb.tcl - To observe the results:
- Make sure that the UART cable is connected to the board and the PC.
- Open Tera Term or PuTTY and configure the serial port (Interface 0) to 115200 baud with the default configuration. The UART console then displays SDI stream details on the console.