Running the Design on the Hardware - Running the Design on the Hardware - 2.0 English - PG290

SMPTE UHD-SDI Receiver Subsystem LogiCORE IP Product Guide (PG290)
Document_ID
PG290
Release_Date
2026-07-22
Version
2.0 English
  1. Launch the Xilinx System Debugger by selecting Start > All Programs > Xilinx Design Tools > Vivado <version> > Vivado <version> Tcl Shell.
  2. In the AMD command shell window, change to the Example Design Project directory: vivado% cd ./<IP instance name>_ex
  3. Invoke the Xilinx System Debugger (xsdb): vivado% xsdb
  4. Establish connections to debug targets: xsdb% connect
  5. Set the target: xsdb% targets -set -filter {name =~ "Versal Gen 2 xc2ve3858"}
  6. Download the bitstream to the FPGA:
    xsdb device program ./<IP instance name>_ex.runs/impl_1/sdi_ex_av_passthru_1l_vek385.pdi
xsdb% after 5000
xsdb% device program ./<IP instance name>_ex.runs/impl_1/sdi_ex_av_passthru_1l_vek385_pld.pdi
  7. Set the target processor:
    xsdb% targets -set -filter {name =~ "Cortex-A78AE #0.0"}
xsdb% rst -processor
  8. Download the software .elf to the FPGA:
    xsdb% after 1000
xsdb% dow ./<vitis_workspace>/vek385_av_pt/build/vek385_av_pt.elf
  9. Run the software: xsdb% con