Navigating Content by Design Process - 2.0 English

SMPTE UHD-SDI Receiver Subsystem LogiCORE IP Product Guide (PG290)

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AMD Adaptive Computing documentation is organized around a set of standard design processes to help you find relevant content for your current development task. You can access the AMD Versal™ adaptive SoC design processes on the Design Hubs page. You can also use the Design Flow Assistant to better understand the design flows and find content that is specific to your intended design needs.

Hardware, IP, and Platform Development​
Creating the PL IP blocks for the hardware platform, creating PL kernels, functional simulation, and evaluating the AMD Vivado™ timing, resource use, and power closure. Also involves developing the hardware platform for system integration. Topics in this document that apply to this design process include:

For driver information, see the AMD GitHub.

For IP patch information, see the SMPTE UHD-SDI Receiver (RX) Subsystem Release Notes and Known Issues AR# 68766.