AXI4-Lite Interface Ports - 2.0 English - PG290

SMPTE UHD-SDI Receiver Subsystem LogiCORE IP Product Guide (PG290)
Document ID
PG290
Release Date
2025-11-26
Version
2.0 English
These signals are enabled when the AXI4-Lite interface option is selected.
Table 1. AXI4-Lite Interface Port Descriptions
Signal I/O Description
s_axi_aclk I AXI4-Lite clock
s_axi_arstn I AXI4-Lite reset. Active-Low
S_AXI_CTRL*   AXI4-Lite interface, defined in the Vivado Design Suite: AXI Reference Guide (UG1037).