Running the Example Design - 2.0 English - PG289

SMPTE UHD- Transmitter Subsystem LogiCORE IP Product Guide (PG289)
Document ID
PG289
Release Date
2024-12-11
Version
2.0 English
  1. Open the Vivado Design Suite and create a new project.
  2. In the pop-up window, press Next five times, as shown in the following figure.
    Figure 1. Creating a New Project
  3. Select the board (ZCU106 supported), as shown below.
    Figure 2. Select the Board
  4. Click Finish.
  5. Click IP Catalog and select the SMPTE UHD-SDI TX Subsystem under Video Connectivity, and double-click on it.
    Figure 3. Select the SMPTE UHD-SDI TX Subsystem

    For the Application Example Design flow, the IP configuration is based on the options selected in the Application Example Design tab. You can rename the IP component name, which is used as Application Example Design project name.

  6. Configure the SMPTE UHD-SDI TX Subsystem Application Example Design tab, as shown in the following figure.
    Figure 4. SMPTE UHD-SDI TX Subsystem Application Example Design Tab
  7. Click OK. The Generate Output Products dialog box appears.
    Figure 5. Generate Output Products Dialog
  8. Click Generate.
    Note: You can optionally click Skip if you want to generate the Application Example Design.
  9. Right-click the SMPTE UHD-SDI TX Subsystem component under Design source, and click Open IP Example Design.
    Figure 6. Open the IP Sample Design
  10. Choose the target project location, and then click OK. The IP integrator design is then generated and creates the AMD Vitis™ application. You can choose to Run Synthesis, Implementation, or Generate Bitstream. An overall system IP integrator block diagram of the ZCU106-based example design is as follows.
    Figure 7. Block diagram of the ZCU106-based Example Design